(China (Mainland))
Product Summary
The CN8478EPF is a multichannel synchronous communications controller (MUSYCC) that format and deformat up to 256 (CN8478), 128 (CN8474A), 64 (CN8472A), or 32 (CN8471A) HDLC channels in a single CMOS integrated circuit. MUSYCC operates at Layer 2 of the Open Systems Interconnection (OSI) protocol reference model. The CN8478EPF provides a comprehensive, high-density solution for processing HDLC channels for internetworking applications such as Frame Relay, ISDN D-channel signaling, X.25, Signaling System 7 (SS7), DXI, ISUP, and LAN/WAN data transport. Under minimal host supervision, The CN8478EPF manages a linked list of channel data buffers in host memory by performing Direct Memory Access (DMA) of the HDLC channels.
Parametrics
CN8478EPF absolute maximum ratings: (1)Supply Voltage Vdd, Vddo: –0.5 to 4.6 V; (2)Continuous Power Dissipation Pd: 750 mW; (3)Operating Junction Temperature Tjc: 125 °C; (4)Storage Temperature Ts: –55 to +125 °C; (5)5 V–Tolerant Supply VGG: –0.5 to 6 V; (6)Core Supply VDDC: –0.5 to 3.3 V; (7)5 V–Tolerant DC Input Input, Hi–Z Out: –0.5 to VGG + 0.5V (not to exceed 6 V); (8)5 V–Tolerant DC Output Output Lo-Z: –0.5 to Vdd + 0.5V (not to exceed 4.6 V).
Features
CN8478EPF features: (1)256-, 128-, 64-, or 32-channel HDLC controller; (2)OSI Layer 2 protocol support; (3)General purpose HDLC (ISO 3309): X.25 (LAPB), Frame relay (LAPF/ANSI T1.618), ISDN D-channel (LAPD/Q.921), SS7 support; (4)8, 4, 2, or 1 independent serial interfaces which support: T1/E1 data streams, DC to 8.192 Mbps TDM busses; (5)Configurable logical channels: Standard DS0 (56, 64 kbps), Hyperchannel (Nx64), Subchannel (Nx8); (6)Per-channel protocol mode selection: 16-bit FCS mode, 32-bit FCS mode, SS7 mode (16-bit FCS), Transparent mode (unformatted data); (7)Per-channel DMA buffer management: Linked list data structures, Variable size transmit/receive FIFO.
Diagrams
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 CN8478 |
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Negotiable |
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CN8474A |
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Negotiable |
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CN8472A |
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Negotiable |
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CN8471A |
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Negotiable |
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